71. Arithmetic Logic Unit

How do you plan to solve it?

module alu4 (
    input  [3:0] a,
    input  [3:0] b,
    input  [2:0] op,
    output reg [3:0] y,
    output reg cf
);

reg [4:0] tmp;

always @(*) begin
    y  = 4'b0000;
    cf = 1'b0;
    tmp = 5'b00000;

    case (op)

        // ADD
        3'b000: begin
            tmp = {1'b0,a} + {1'b0,b};
            y  = tmp[3:0];
            cf = tmp[4];
        end

        // SUB (two's complement)
        3'b001: begin
            tmp = {1'b0,a} + {1'b0,~b} + 5'b00001;
            y  = tmp[3:0];
            cf = ~tmp[4];   // ✅ borrow
        end

        // AND
        3'b010: y = a & b;

        // OR
        3'b011: y = a | b;

        // XOR
        3'b100: y = a ^ b;

        // reserved
        default: begin
            y  = 4'b0000;
            cf = 1'b0;
        end
    endcase
end

endmodule