How do you plan to solve it?
/*Write your code here*/
module alu4(
input [3:0]a,b,
input [2:0]op,
output reg [4:0]y,
output reg cf
);
localparam [2:0]
ADD = 3'b000,
SUB = 3'b001,
AND = 3'b010,
OR = 3'b011,
XOR = 3'b100;
wire [4:0] add5 = {1'b0, a} + {1'b0, b}; // ADD path
wire [4:0] sub5 = {1'b0, a} + {1'b0, ~b} + 5'b1; // SUB path
always @* begin
y = 4'b0000;
cf = 1'b0;
case (op)
ADD: begin
y=add5[3:0];
cf=add5[4];
end // pass-through
SUB : begin
y=sub5[3:0];
cf = ~sub5[4];
end
// logical left
AND :begin
y=a&b;
cf=1'b0;
end // logical right
OR :begin
y=a|b;
cf=1'b0;
end
// arithmetic right
XOR : begin
y=a^b;
cf=1'b0;
end // rotate left
// rotate right
default:begin
y=4'b0000;
cf=1'b0;
end // reserved → PASS
endcase
end
endmodule