71. Arithmetic Logic Unit

How do you plan to solve it?

module alu4 (
    input      [3:0] a, b,
    input      [2:0] op,
    output reg [3:0] y,
    output reg       cf
);

    always @* begin
        case (op)
            3'b000: {cf, y} = a + b;  // ADD
            3'b001: {cf, y} = a - b;  // SUB
            3'b010: {cf, y} = {1'b0, (a & b)};  // AND
            3'b011: {cf, y} = {1'b0, (a | b)};  // OR
            3'b100: {cf, y} = {1'b0, (a ^ b)};  // XOR
            default: {cf, y} = 5'd0;
        endcase
    end

endmodule