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71. Arithmetic Logic Unit

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Solving Approach

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Code

/*Write your code here*/
module alu4(
    input [3:0] a,b,
    input [2:0] op,
    output cf,
    output [3:0] y
);

reg [4:0] temp,cf_temp;

always@* begin
temp = 4'd0;
cf_temp = 0;
case(op) 
    3'd0    : begin temp = a+b; cf_temp = temp[4];   end
    3'd1    : begin temp = a+(~b)+1; cf_temp = temp[4];   end
    3'd2    : begin temp = a&b; cf_temp = 0;   end
    3'd3    : begin temp = a|b; cf_temp = 0;   end
    3'd4   :  begin temp = a^b; cf_temp = 0;   end
    default : begin temp = 4'd0; cf_temp = 0; end
endcase
end
assign cf = cf_temp;
assign y = temp[3:0];
endmodule

 

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