/*Write your code here*/
module alu4 (
input [3:0] a, b,
input [2:0] op,
output reg cf,
output reg [3:0] y
);
always @* begin
cf=0;
case (op)
3'b000 : {cf,y} = {1'b0,a} + {1'b0,b};
3'b001 : begin
y = ( a + (~b+1));
cf = (a < b);
end
3'b010 : y = a & b;
3'b011 : y = a | b;
3'b100 : y = a ^ b;
default : y = 4'b0000;
endcase
end
endmodule