71. Arithmetic Logic Unit

How do you plan to solve it?

/*Write your code here*/
module alu4(
input [3:0] a, b,
input [2:0] op,
output reg [3:0] y,
output reg cf
);
localparam [2:0]
add = 3'b000,
sub = 3'b001,
op_and = 3'b010,
op_or = 3'b011,
op_xor = 3'b100;
wire [4:0] add5 = {1'b0, a}+{1'b0, b};
wire [4:0] sub5 = {1'b0, a}+{1'b0, ~b}+5'b1;
always @* begin
    y = 4'b0000;
    cf = 1'b0;
    case (op)
    add : begin
        y = add5[3:0];
        cf = add5[4];
    end
    sub : begin
        y =sub5[3:0];
        cf = ~sub5[4];
    end
    op_and: y = a&b;
    op_or : y = a|b;
    op_xor : y = a^b;
    default: begin y = 4'b0000; cf = 1'b0; end
    endcase
end
endmodule