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71. Arithmetic Logic Unit

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Solving Approach

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Code

module alu4(
    input [3:0]a,b,
    input [2:0]op,
    output reg [3:0]y,
    output reg cf
);
   reg [4:0]x,p;

always @ (*)
begin
    x=a+b;
    p=a-b;
    cf=0;
    case(op)
    3'b000: 
    begin 
        y=x[3:0];
        cf=x[4];
    end
    3'b001:
    begin 
        y=p[3:0];
        cf=p[4];
    end
    3'b010: y = a&b;
    3'b011: y = a|b;
    3'b100: y = a^b;
    default: y = 4'b0000;
    endcase
end

endmodule

 

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