71. Arithmetic Logic Unit

How do you plan to solve it?

/*Write your code here*/
module alu4(input [3:0]a,b,input [2:0]op,output reg [3:0]y,output reg cf);
wire [4:0] sum = {1'b0, a} + {1'b0, b};
wire [4:0] diff = {1'b0, a} + {1'b0, ~b} + 5'b00001;
always@(*)begin
    case(op)
        3'b000: begin
        y = sum[3:0];
        cf = sum[4];
        end
        3'b001: begin
            y = diff[3:0];
            cf = ~diff[4];
        end
        3'b010:begin
             y = a & b;
            cf = 1'b0;
        end
        3'b011: begin
            y = a | b;
            cf = 1'b0;
        end
        3'b100: begin
            y = a ^ b;
            cf = 1'b0;
        end
        default: begin
            y = 4'b0000;
            cf = 1'b0;
        end
    endcase
end
endmodule