/*Write your code here*/
module alu4( input [3:0] a,
input [3:0]b,
input [2:0] op,
output reg [3:0] y,
output reg cf);
reg carry;
reg borrow;
always@(*)
case(op)
3'b000: begin
{carry,y }= a+ b;
cf = carry;
end
3'b001: begin
{borrow, y} = a + ~b +1;
cf = borrow;
end
3'b010: begin
y= a &b;
cf =0;
end
3'b011: begin
y = a |b;
cf =0;
end
3'b100: begin
y = a ^b;
cf = 0;
end
default:begin
y = 4'b0000;
cf = 0;
end
endcase
endmodule