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71. Arithmetic Logic Unit

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Solving Approach

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Code

/*Write your code here*/
module alu4(
    input [3:0] a,
    input [3:0] b,
    input [2:0] op,
    output reg [3:0] y,
    output reg cf
);
    reg carry;
    always @* begin
        cf = 1'b0;
        case (op)
            3'b000: begin
                {carry, y} = {1'b0, a} + {1'b0, b}; // ADD : {carry, y} = a + b, cf = carry
                cf = carry;
            end
            3'b001: begin
                {carry, y} = {1'b0, a} + {1'b0, ~b} + 5'b00001; // SUB : y = a − b via two’s complement (a + ~b + 1), cf = borrow = ~carry_out
                cf = ~carry;
            end
            3'b010: begin
                y = a & b; // AND : y = a & b, cf = 0
            end
            3'b011: begin
                y = a | b; // OR : y = a | b, cf = 0
            end
            3'b100: begin
                y = a ^ b; // XOR : y = a ^ b, cf = 0
            end
            default: y = 4'b0000; // reserved
        endcase
    end

endmodule

 

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