How do you plan to solve it?
module alu4 (
input [3:0] a,
input [3:0] b,
input [2:0] op,
output reg [3:0] y,
output reg cf
);
reg borrow;
always @(a or b or op)
case (op)
3'b000: {cf, y} = {1'b0, a} + {1'b0, b};
3'b001: begin
{borrow, y} = {1'b0, a} + {1'b0, ~b} + 5'b1;
cf = ~borrow;
end
3'b010: begin
y = a & b;
cf = 0;
end
3'b011: begin
y = a | b;
cf = 0;
end
3'b100: begin
y = a ^ b;
cf = 0;
end
default: begin
y = 4'b0000;
cf = 1'b0;
end
endcase
endmodule