Problem: Full Subtractor Design. Solve this hands-on electronics task on EWskills.

Output Difference Analysis: The Difference output turns on (1) whenever an odd number of inputs are high (either exactly one input is 1, or all three are 1). Like a full adder, this is implemented using two cascaded XOR gates in a row. Output Borrow Analysis: The Borrow output turns on (1) when the net subtraction requires a borrow from the next stage. To save space and use fewer gates, the logic reuses the intermediate calculation from the first XOR gate by inverting it before combining it with Borrow In. Hardware Optimization: Minuend A and Subtrahend B pass through a first stage of gates to produce a temporary difference and a temporary borrow. These terms feed into a secondary stage along with Borrow In, sharing common hardware paths to keep the overall gate footprint as small as possible. Boolean Equations: Output Difference = (Minuend A ^ Subtrahend B) ^ Borrow In Output Borrow = (~Minuend A . Subtrahend B) + (Borrow In . ~(Minuend A ^ Subtrahend B))

50. Full Subtractor Design

Implement a 1-bit arithmetic Full Subtractor circuit matching the behavioral reference to compute the final difference and an updated borrow-out signal from a minuend, a subtrahend, and an incoming borrow bit.

Constraints:

Inputs: Minuend A, Subtrahend B, Borrow In
Outputs: Output Difference, Output Borrow
Components: Optimized layout to achieve a clean, simplified component footprint driving both channels concurrently

Behavioral Reference:

Minuend A	Subtrahend B	Borrow In	Output Difference	Output Borrow
0	0	0	0	0
0	0	1	1	1
0	1	0	1	1
0	1	1	0	1
1	0	0	1	0
1	0	1	0	0
1	1	0	0	0
1	1	1	1	1

Need Help? Refer to the Quick Guide below

Combinational arithmetic circuits convert the present binary inputs into arithmetic results. Their outputs change whenever the inputs change; they do not store data or require a clock.

Signal flow:

Binary inputs → Arithmetic logic → Result and Status flags

Arithmetic Building Blocks

Function	Main inputs	Main output	Additional information
Addition	A, B, optional Cin	Sum	Cout may pass to the next bit
Subtraction	A, B, optional Bin	Difference	Bout may pass to the next bit
Multiplication	Two binary operands	Product	Partial products are added
Operation selection	Candidate results and control inputs	Result	Flags may be generated separately

Without an incoming carry or borrow, the circuit behaves as a half block. With one, it behaves as a full block.

One-Bit Arithmetic

A single bit position produces two outputs: the result bit for that position and a carry or borrow for the next position.

A, B, Cin → addition logic → Sum, Cout

A, B, Bin → subtraction logic → Difference, Bout

Addition

Sum = A ⊕ B ⊕ Cin
Cout = A·B + Cin·(A ⊕ B)

The Sum is HIGH when an odd number of the three inputs is HIGH. The Carry-out is HIGH when at least two inputs are HIGH.

When there is no incoming carry, set Cin = 0. This gives the half-adder behaviour:

Sum = A ⊕ B
Cout = A·B

Subtraction

Difference = A ⊕ B ⊕ Bin
Bout = ~A·B + Bin·~(A ⊕ B)

The Borrow-out becomes HIGH when the minuend bit A cannot provide the value required by B and Bin.

When there is no incoming borrow, set Bin = 0. This gives the half-subtractor behaviour:

Difference = A ⊕ B
Bout = ~A·B

1-Bit-Arithmetic-Unit-half-adder,subtractor-combined

Extending Arithmetic to Multiple Bits

Repeat the one-bit arithmetic cell for every bit position. Start at the LSB because the first carry or borrow is generated there.

LSB stage → next bit stage → ... → MSB stage

For addition, connect each Cout to the next stage's Cin. For subtraction, connect each Bout to the next stage's Bin.

Ripple and Lookahead Carry

Adder type	Main idea	Benefit	Limitation
Ripple-carry	Carry travels through each stage	Simple and compact	Delay increases with bit width
Carry-lookahead	Carries are calculated using generate/propagate logic	Faster carry path	Requires extra gates and wiring

For a carry-lookahead design:

P_i = A_i ⊕ B_i (propagate)
G_i = A_i·B_i (generate)
C(i+1) = G_i + P_i·C_i

The same design choice applies to subtraction: a ripple borrow path is simpler, while additional logic can calculate borrows earlier.

Always check the final carry or borrow before discarding it. It may indicate an unsigned range error even when the fixed-width result looks valid.

Multiplication as a Partial-Product Process

Binary multiplication is built from repeated AND operations and additions.

Generate each partial product: PartialProduct(i,j) = A_i·B_j.
Shift each partial product according to its bit position.
Add the aligned columns using half adders or full adders.
Connect the carries to the next higher column.

Signal flow:

AND-generated partial products → Shifted rows → Column adders → Product

An n-bit by n-bit unsigned multiplication may require up to 2n product bits. If the output is narrower, define whether the upper bits are discarded, saturated, or reported as overflow.

Signed Values and Overflow

The same gate structure can behave differently depending on how the bits are interpreted.

Representation	Important rule	Main check
Unsigned	All bits represent magnitude	Final Cout or Bout shows range information
Signed-magnitude	One sign bit and separate magnitude bits	SignP = SignA ⊕ SignB for multiplication
2's complement	The MSB contributes the sign and weight	V = C_MSB_in ⊕ C_MSB_out for addition

For signed-magnitude multiplication, multiply the magnitudes separately and determine the product sign with XOR. Confirm that the output has enough magnitude bits.

Signed-Magnitude-Multiplier-with-Overflow

For 2's complement addition, the final carry-out is not the signed overflow flag. Overflow occurs when the carry entering the MSB differs from the carry leaving the MSB. Equivalently, adding two values with the same sign must not produce a result with the opposite sign.

Selecting Arithmetic Operations

An ALU or arithmetic selector usually calculates several candidate results in parallel and then uses a multiplexer to select one.

AND, OR, XOR, and ADD results → multiplexer → Result

The control inputs select the required operation. Carry, borrow, overflow, or other status outputs may use separate logic and may remain active even when another result is selected.

Before building the circuit, decide whether the control inputs select only the result or also control the status flags.

Arithmetic-Operation-Selector-With-Carry

From Specification to Circuit

Use this flow for any arithmetic circuit:

Define the representation: unsigned, signed-magnitude, or 2's complement.
Fix the width: identify the MSB, LSB, product width, and overflow behaviour.
List the outputs: result bits, carry, borrow, sign, or overflow.
Write the per-bit equations: use XOR for sum/difference behaviour and separate carry/borrow conditions.
Choose the structure: ripple for simplicity, lookahead for speed, or shared logic for fewer gates.
Verify boundary cases: zero, maximum values, carry generation, borrow generation, sign changes, and output-width limits.

Common Mistakes

Reversing the minuend and subtrahend.
Connecting carry or borrow toward the LSB instead of the MSB.
Treating the final carry as signed overflow.
Losing a carry while adding multiplier columns.
Ignoring the output width of a product or fixed-width subtraction.
Selecting the correct result but unintentionally disabling the carry or status path.
Rebuilding shared XOR terms instead of reusing them in carry or borrow logic.

Quick Summary

Half adder: Sum = A ⊕ B, Cout = A·B
Full adder: Sum = A ⊕ B ⊕ Cin
Full adder: Cout = A·B + Cin·(A ⊕ B)
Half subtractor: Difference = A ⊕ B, Bout = ~A·B
Full subtractor: Difference = A ⊕ B ⊕ Bin
Full subtractor: Bout = ~A·B + Bin·~(A ⊕ B)
Multiplier: partial products → shifted columns → adders
Signed product sign: SignA ⊕ SignB
2's complement overflow: MSB carry-in ⊕ MSB carry-out