How do you plan to solve it?
module nibble_swap_task(
input wire [7:0] x,
output reg [7:0] y
);
// -------------------------------
// Task: extract high + low nibble
// -------------------------------
task swap_nibbles(
input [7:0] xin,
output [3:0] hi,
output [3:0] lo
);
begin
hi = xin[7:4]; // high nibble
lo = xin[3:0]; // low nibble
end
endtask
// Temporary nibble storage
reg [3:0] hi_nib, lo_nib;
// -------------------------------
// Combinational logic block
// -------------------------------
always @(*) begin
swap_nibbles(x, hi_nib, lo_nib); // call task
y = {lo_nib, hi_nib}; // swap positions
end
endmodule