/*Write your code here*/
module signed_thresh(input[7:0] sample,
input[7:0] thresh,
output gt_unsigned,
output gt_signed);
wire signed[7:0] signed_sample;
wire signed[7:0] signed_thresh;
assign signed_sample = $signed(sample);
assign signed_thresh = $signed(thresh);
assign gt_unsigned = (sample > thresh) ? 1 : 0;
assign gt_signed = (signed_sample > signed_thresh) ? 1 : 0;
endmodule