45. Signed vs Unsigned Compare

How do you plan to solve it?

/*Write your code here*/
module signed_thresh(
    input wire [7:0]sample,
    input wire [7:0]thresh,
    output wire gt_signed,
    output wire gt_unsigned
);

assign gt_unsigned = (sample > thresh)?1'b1 : 1'b0 ;
assign gt_signed = ($signed(sample) > $signed(thresh)? 1'b1 : 1'b0);

endmodule