45. Signed vs Unsigned Compare

How do you plan to solve it?

/*Write your code here*/
module signed_thresh(
    input [7:0] sample,
    input [7:0] thresh,
    output gt_unsigned,
    output gt_signed
);
    wire wire1, wire2;
    assign wire1 = sample > thresh;
    assign wire2 = $signed(sample) > $signed(thresh);
    assign gt_unsigned = wire1;
    assign gt_signed = wire2;
endmodule