/*Write your code here*/
module univ_barrel8(
input signed [7:0] x,
input [2:0] sh,
input [2:0] mode,
output reg [7:0] y
);
parameter PASS=3'b000;
parameter LSL=3'b001;
parameter LSR=3'b010;
parameter ASR=3'b011;
parameter ROL=3'b100;
parameter ROR=3'b101;
always @(*) begin
case (mode)
PASS: y = x;
LSL: y = x << sh;
LSR: y = x >> sh;
ASR: y = x >>> sh;
ROL: y = (x << sh) | (x >> 8 - sh);
ROR: y = (x >> sh) | (x << 8 - sh);
default: y = x;
endcase
end
endmodule