70. Universal Barrel Shifter

How do you plan to solve it?

// 8-bit Universal Barrel Shifter - CLEAN PURE VERILOG-2001
module univ_barrel8 (
    input  wire [7:0] x,
    input  wire [2:0] sh,
    input  wire [2:0] mode,
    output wire [7:0] y
);

    wire [7:0] lsl  = x << sh;
    wire [7:0] lsr  = x >> sh;
    wire [7:0] asr  = (x[7] ? ~({8{1'b1}} >> sh) : 8'b0) | (x >> sh);
    wire [7:0] rol  = (x << sh) | (x >> (8 - sh));
    wire [7:0] ror  = (x >> sh) | (x << (8 - sh));

    assign y = (mode == 3'b000) ? x :
               (mode == 3'b001) ? lsl :
               (mode == 3'b010) ? lsr :
               (mode == 3'b011) ? asr :
               (mode == 3'b100) ? rol :
               (mode == 3'b101) ? ror :
               x;  // default PASS

endmodule