/*Write your code here*/
module univ_barrel8(input [7:0]x, input[2:0] sh, input[2:0] mode ,output reg [7:0]y);
reg temp;
always @*
begin
case(mode)
3'd0:
y=(x);
3'd1:
y=(x<<sh);
3'd2:
y=(x>>sh);
3'd3:
y=$signed(x)>>>sh;
3'd4:
y=(x<<sh) | x>>(8-sh);
3'd5:
y=(x>>sh)|(x<<(8-sh));
endcase
end
endmodule