40. 4-to-1 Data Selector

• Output Select Analysis: The select lines (S1, S0) act as a binary switch to open a single data path. The output (Y) matches the state of the chosen data input (A, B, C, or D) while blocking out the rest.
• Hardware Optimization: The circuit splits the select lines into inverted paths using NOT gates. Four separate AND gates combine these select lines with the data inputs so that only one path is active at a time, feeding into a final OR gate to deliver the clean output.

Boolean Equations:

Y = (A . ~S1 . ~S0) + (B . ~S1 . S0) + (C . S1 . ~S0) + (D . S1 . S0)