How do you plan to solve it?
module bin2gray4 ( input [3:0] bin_in, output [3:0] gray_out ); // assign gray_out = {bin_in[3], bin_in[3]^bin_in[2], bin_in[2]^bin_in[1], bin_in[1]^bin_in[0]}; assign gray_out = bin_in ^ (bin_in >> 1); endmodule