/*Write your code here*/
module bin2gray4 (
input [3:0] bin_in,
output reg [3:0] gray_out
);
always @ (*) begin
case (bin_in)
0:gray_out = 0;
1:gray_out = 1;
2:gray_out = 3;
3:gray_out = 2;
4:gray_out = 6;
5:gray_out = 7;
6:gray_out = 5;
7:gray_out = 4;
8:gray_out = 12;
9:gray_out = 13;
10:gray_out = 15;
11:gray_out = 14;
12:gray_out = 10;
13:gray_out = 11;
14:gray_out = 9;
15:gray_out = 8;
endcase
end
endmodule