module demux1to2(
input d,
input s,
output [1:0] y
);
assign y[0] = d & ~s;
assign y[1] = d & s;
endmodule
module demux1to4(
input d,
input [1:0] s,
output [3:0] y
);
wire [1:0] intern;
// First stage: split between y0y1 and y2y3
demux1to2 d1(.d(d), .s(s[1]), .y(intern));
// Second stage: split further
demux1to2 d2(.d(intern[0]), .s(s[0]), .y(y[1:0]));
demux1to2 d3(.d(intern[1]), .s(s[0]), .y(y[3:2]));
endmodule