42. Equality Operators

How do you plan to solve it?

module x_detector(
    input  wire [1:0] a,
    output wire       eq_logic,
    output wire       eq_case
);

    assign eq_logic = (a == 2'bx1);   // logical equality: X is wildcard
    assign eq_case  = (a === 2'bx1);  // case equality: X must match exactly

endmodule