2. Fan-Out Wire

How do you plan to solve it?

Since all outputs must 'always' match the input, therefore this is again performed using 'assign' keyword.

module top_module(input a, output y1,y2,y3
    // Declare Inputs and outputs here
);
    // Module functionality here
    assign y1 = a;
    assign y2 = a;
    assign y3 = a;
endmodule