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14. Logical Shifter

Design an 8-bit logical shifter that outputs both the left-shifted and right-shifted versions of its input by a variable amount.

Requirements

  • Module name: shift8
  • Inputs:
    • A[7:0] — data to shift
    • shamt[2:0] — shift amount (0–7)
  • Outputs:
    • SHL[7:0] — logical left shift, A << shamt
    • SHR[7:0] — logical right shift, A >> shamt

Notes

  • Use logical shifts only (<<, >>).
  • Vacated bits must be filled with 0; bits shifted out are discarded.
  • If shamt = 0, then SHL = SHR = A.

Worked examples

For A = 8'b1010_1100 (0xAC):

shamtSHL (A << shamt)SHR (A >> shamt)
01010_11001010_1100
10101_10000101_0110
30110_00000001_0101
70000_00000000_0001


 

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