14. Logical Shifter

How do you plan to solve it?

module shift8(A,shamt,SHL,SHR);
input [7:0] A;
input [2:0] shamt;
output [7:0] SHL,SHR;

assign SHL=(shamt)? A << shamt : A;
assign SHR=(shamt)? A >> shamt : A;

endmodule