14. Logical Shifter

How do you plan to solve it?

/*Write your code here*/
module shift8(input [7:0]A,
              input [2:0]shamt,
              output [7:0]SHL,SHR);
    assign SHL=shamt?(A<<shamt):A;
    assign SHR=shamt?(A>>shamt):A;
endmodule