How do you plan to solve it?
/*Write your code here*/ module shift8(input wire [7:0]A, input wire [2:0]shamt, output reg [7:0]SHL, SHR); always @(*) begin if(shamt == 3'b000) begin SHL = A; SHR = A; end else begin SHL = A << shamt; SHR = A >> shamt; end end endmodule