14. Logical Shifter

How do you plan to solve it?

module shift8(
    input [7:0] A,
    input [2:0] shamt,
    output [7:0] SHL,
    output [7:0] SHR
);
    assign SHL[7:0] = A << shamt;
    assign SHR[7:0] = A >> shamt;

endmodule