14. Logical Shifter

How do you plan to solve it?

/*Write your code here*/
module shift8(A,shamt,SHL,SHR);
    input [7:0]A;
    input [3:0]shamt;
    output [7:0] SHL, SHR;

    assign SHL = A << shamt;
    assign SHR = A >> shamt;
    
endmodule