1. Memory Module Select
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A memory module activation circuit asserts its output only when both control signals are high. The implementation follows the Boolean identity:
Output = (Address Match OR Read Enable) XOR (Address Match XOR Read Enable)
To understand how this line is evaluated, we examine the truth table for all input combinations (A = Address Match, B = Read Enable):
| A | B | (A OR B) | (A XOR B) | Final Result: (OR) XOR (XOR) |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 XOR 0 = 0 |
| 0 | 1 | 1 | 1 | 1 XOR 1 = 0 |
| 1 | 0 | 1 | 1 | 1 XOR 1 = 0 |
| 1 | 1 | 1 | 0 | 1 XOR 0 = 1 |
Calculation breakdown:
- Case (0,0): OR yields 0, XOR yields 0. Final XOR (0,0) results in 0.
- Case (0,1) & (1,0): OR yields 1, XOR yields 1 (inputs are different). Final XOR (1,1) results in 0.
- Case (1,1): OR yields 1, XOR yields 0 (inputs are the same). Final XOR (1,0) results in 1.
This demonstrates that the final output is only high when both inputs are high, effectively synthesizing an AND operation using only OR and XOR gates.