73. SR Latch

How do you plan to solve it?

module sr_latch_nor (
    input  S,
    input  R,
    output reg Q,
    output reg Qn
);
    // Write your code here
    always@(*)begin
        case({R,S})
          2'b10 : {Q,Qn} = 2'b01;
          2'b01 : {Q,Qn} = 2'b10;
          2'b00 : {Q,Qn} = {Q,Qn};
          2'b11 : {Q,Qn} = 2'b01;
         // 2'b10 : {Q,Qn} = 2'b01;
        endcase
    end
    
endmodule