73. SR Latch

How do you plan to solve it?

module sr_latch_nor (
    input  S,
    input  R,
    output Q,
    output Qn
);
    // Write your code here
    reg q;
    assign Q= q;
    assign Qn= ~q;
    always @(*)
    begin
        case ({S,R})
        2'b00: q=q;
        2'b01: q=1'b0;
        2'b10: q=1'b1;
        2'b11: q=1'b0;
        default: q=q;
        endcase
    end
    
endmodule