73. SR Latch

How do you plan to solve it?

module sr_latch_nor (
    input  S,
    input  R,
    output Q,
    output Qn
);
   wire w1;
    and instance_(w1, S, ~R);
    nor instance1butwhatever(Qn, Q, w1);
    nor instance_0(Q, R, Qn);

    
endmodule