73. SR Latch

How do you plan to solve it?

module sr_latch_nor (
    input  S,
    input  R,
    output Q,
    output Qn
);

wire notr,and1 ,nor1,nor2;
assign notr=(~R);
assign and1=(S&notr);
assign nor1=(~(nor2|R));
assign nor2=(~(nor1|and1));
assign Q=nor1;
assign Qn=nor2;
    // Write your code here
    
endmodule