73. SR Latch

How do you plan to solve it?

module sr_latch_nor (
    input  S,
    input  R,
    output reg Q,
    output reg Qn
);
    always @(*) begin
        case ({S, R})
            2'b00: {Q, Qn} = {Q, Qn}; // HOLD
            2'b01: {Q, Qn} = 2'b01; // RESET
            2'b10: {Q, Qn} = 2'b10; // SET
            2'b11: {Q, Qn} = 2'b01; // RESET
        endcase
    end
endmodule