73. SR Latch

How do you plan to solve it?

module sr_latch_nor (
    input S,
    input R,
    output Q,
    output Qn
);
    wire w1,w2;
    nor (Q,  w1, Qn);
    nor (Qn, w2, Q);

    assign w1 = R;
    assign w2 = S & ~R;

endmodule