73. SR Latch

How do you plan to solve it?

module sr_latch_nor (
    input  S,
    input  R,
    output Q,
    output Qn
);
    // Write your code here
    wire rn,a0;
    not g0(rn,R);
    and g1(a0,S,rn);
    nor g2(Q,Qn,R);
    nor g3(Qn,a0,Q);

endmodule