73. SR Latch

How do you plan to solve it?

module sr_latch_nor (
    input  S,
    input  R,
    output reg Q,
    output reg  Qn
);
    // Write your code here

    always @(*)begin
        Q<= ~(R | Qn);
        Qn <= ~(Q| (S&~R));
    end
    
endmodule