73. SR Latch

How do you plan to solve it?

module sr_latch_nor (
    input  S,
    input  R,
    output Q,
    output Qn
);
    // Write your code here
    reg Q_1;
    reg Qn_1;
    always@(*) begin
    if ( S ==1'b1 && R == 1'b0) begin
     
        Q_1 = 1'b1;
        Qn_1=1'b0;
     
    end else if ( S == 0 && R ==1) begin
    
        Q_1 = 1'b0;
        Qn_1 = 1'b1;
    end else if ( S ==1 && R ==1)begin
        Q_1 = 1'b0;
        Qn_1 = 1'b1;
    
    end
    end
    assign Q = Q_1;
    assign Qn = Qn_1;
endmodule