11. Vector Concatenation

How do you plan to solve it?

module concat8_packer (
    input [3:0] A,
    input [1:0] B,
    input C,
    input D,
    output [7:0] OUT
);

    wire C1;
    assign C1 = !C;
    assign OUT = {A [3:0], B [1:0], C1, D };
endmodule