11. Vector Concatenation

How do you plan to solve it?

// Module: concat8_packer
// Description: Packs A, B, ~C, and D into an 8-bit output OUT
// Bit layout: OUT = {A[3:0], B[1:0], ~C, D}

module concat8_packer (
    input  [3:0] A,   // 4-bit input
    input  [1:0] B,   // 2-bit input
    input        C,   // 1-bit input
    input        D,   // 1-bit input
    output [7:0] OUT  // 8-bit packed output
);

    // Concatenate according to mapping
    assign OUT = {A, B, ~C, D};

endmodule