11. Vector Concatenation

How do you plan to solve it?

/*Write your code here*/
module concat8_packer(  input wire[3:0] A, 
                        input wire[1:0] B, 
                        input C, D,
                        output wire[7:0] OUT);

    assign OUT[7:4] = A;
    assign OUT[3:2] = B;
    assign OUT[1] = !C;
    assign OUT[0] = D;

endmodule