How do you plan to solve it?
module concat8_packer(A,B,C,D,OUT); input wire [3:0] A; input wire [1:0] B; input wire C,D; output wire [7:0] OUT; assign OUT [7:4] = A [3:0]; assign OUT [3:2] = B [1:0]; assign OUT [1] = ~C; assign OUT [0] = D; endmodule