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11. Vector Concatenation

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Solving Approach

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Code

module concat8_packer (
    input  [3:0] A,   // bits [7:4]
    input  [1:0] B,   // bits [3:2]
    input        C,   // bit [1] -> inverted
    input        D,   // bit [0]
    output [7:0] OUT  // final packed output
);
    // Concatenate in exact order: A (4 bits), B (2 bits), ~C, D
    assign OUT = {A, B, ~C, D};
endmodule

 

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