45. Combinational Arithmetic Circuits

Question.3

A signed-magnitude multiplier processes the sign bits separately from the magnitude bits.

For two nonzero operands with sign bits SA and SB, which logic operation correctly generates the product sign bit SP?

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Combinational arithmetic circuits produce results directly from the present input values.

Binary Inputs → Arithmetic / Logic Circuit → Result

Binary Addition

Binary addition produces a Sum and Carry. A Half Adder uses A and B; a Full Adder also includes the incoming carry Cin.

Circuit	Inputs	Sum	Carry
Half Adder	`A, B`	`S = A ⊕ B`	`C = A · B`
Full Adder	`A, B, Cin`	`S = A ⊕ B ⊕ Cin`	`Cout = A · B + Cin · (A ⊕ B)`

Four stages add A3_A2_A1_A0 and B3_B2_B1_B0. The carry from each bit becomes the Cin of the next higher bit.

C0 = 0

At bit position n:

Sn = An ⊕ Bn ⊕ Cn

Sn is the Sum bit. The next carry is:

Cn+1 = An · Bn + Cn · (An ⊕ Bn)

The 4-bit output keeps the lower four Sum bits.

S = (A + B) mod 16

Cout = 1 → unsigned result exceeded the 4-bit range

1111 + 0110 = 1 0101 → S = 0101, Cout = 1

Binary subtraction produces a Difference and Borrow. A Full Subtractor also includes the incoming borrow Bin.

Circuit	Inputs	Difference	Borrow
Half Subtractor	`A, B`	`D = A ⊕ B`	`Bout = A' · B`
Full Subtractor	`A, B, Bin`	`D = A ⊕ B ⊕ Bin`	`Bout = A' · B + Bin · (A ⊕ B)'`

Difference is formed by XOR.
Borrow becomes HIGH when the current bit needs a value from the next higher bit.

Each stage subtracts Bn and incoming borrow bn from An. The generated borrow goes to the next higher bit.

b0 = 0

The LSB starts with no incoming borrow.

Dn = An ⊕ Bn ⊕ bn

Dn is the Difference bit at position n.

bn+1 = An' · Bn + bn · (An ⊕ Bn)'

A borrow is generated when An is not sufficient to subtract Bn and the incoming borrow.

D = (A - B) mod 16

For a 4-bit subtractor, only the lower 4 result bits are stored in D.

Bout = 1 → unsigned underflow occurred

This means A < B, so the unsigned subtraction required a borrow beyond the MSB.

Example:

0010 - 0111 = 1 1011 → D = 1011, Bout = 1

The 4-bit result is 1011, while Bout = 1 indicates that 2 < 7.

Let A = A1_A0 and B = B1_B0. AND gates first generate four partial products.

X0 = A0 · B0      X1 = A1 · B0
X2 = A0 · B1      X3 = A1 · B1

The partial products are then added by bit position:

P0 = X0
P1 = X1 ⊕ X2      C1 = X1 · X2
P2 = X3 ⊕ C1      P3 = X3 · C1

2-bit × 2-bit → 4-bit product P3_P2_P1_P0

11₂ × 01₂ = 0011₂

Signed-magnitude multiplication handles the sign and magnitude separately.

The product is negative only when the input signs are different, so XOR generates the sign:

SignP = SignA ⊕ SignB

The magnitude bits are multiplied as unsigned values:

MagnitudeP = MagA × MagB

Maximum 2-bit magnitude = 3 → maximum product magnitude = 9 = 1001₂

A = 1,11 (-3), B = 0,10 (+2) → Product = 1,0110 (-6)

Note: If MagnitudeP = 0000, zero-detection logic may force SignP = 0 to avoid negative zero.

The ALU computes several functions in parallel. Op1_Op0 selects which result appears at the output.

Op1	Op0	Operation	Result
0	0	AND	`A · B`
0	1	OR	`A + B`
1	0	XOR	`A ⊕ B`
1	1	ADD	`A ⊕ B ⊕ Cin`

The ADD path also generates:

Cout = A · B + Cin · (A ⊕ B)

Note: Cout is meaningful when Op1_Op0 = 11 selects ADD.

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