8. 3-Input Logic Optimization
Design a minimized combinational logic circuit based on the provided 3-input truth table. You are required to use a 3-variable Karnaugh map (K-map) to derive the simplified Sum-of-Products (SOP) expression before proceeding with the circuit construction.
Constraints
- You must utilize three input sources: A, B, and C.
- The design must be optimized; simplify the logic using a K-map to achieve a minimal gate count.
- The finalized architecture must be constructed using only standard NOT, AND, and OR gate components.
Behavioral Reference
| A | B | C | Output |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 |