Design a combinational logic circuit for a reconfigurable signal controller. The system must process a single data input (Data In) and provide a controlled output (Data Out) based on the state of a configuration control signal (Config). The circuit must function as a non-inverting buffer when Config is 0 and as an inverter when Config is 1.
Constraints
Behavioral Reference
| Config | Data In | Data Out |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |