36. 4-Input NAND Gate Primitive

How do you plan to solve it?

module nand4_prim (
    input  a,
    input  b,
    input  c,
    input  d,
    output y
);
wire[1:0] w;
    // TODO: instantiate the built-in NAND gate primitive
    // nand <instance_name> ( <out>, <in1>, <in2>, <in3>, <in4> );
    nand n1(w[0],a,b);
    nand n2(w[1],c,d);
    or o1(y,w[1],w[0]);
endmodule